1. Field of the Invention
This invention relates to integrated circuit manufacture and, more particularly, to a method, circuit and apparatus for electrically writing indicia upon and reading indicia from an integrated circuit ("die") during production, test or programming of the die. The indicia is placed so that erroneous indicia can be ignored or corrected, so that the indicia remains highly reliable as to a die which it uniquely identifies from among numerous, similarly manufactured and configured die according to how, when and where the die was manufactured, tested or programmed, etc.
2. Description of the Related Art
An integrated circuit is often referred to as a die or chip. Those terms are henceforth interchangeably used. A die may contain several thousand active and passive devices, formed on a monolithic substrate. Those devices can be interconnected to form an overall circuit. Active devices include transistors, whereas passive devices include resistors and capacitors, for example.
Active and passive devices can be coupled to form one or more memory elements arranged across a die. A popular memory device is one which can be electrically programmed after the die is manufactured. However, once the storage elements are programmed, they are preferably non-volatile. Present non-volatile storage elements include, for example, programmable read only memory (PROM), fuses and/or anti-fuses, etc. Examples of popular PROMs include EPROMs, EEPROMs or flash EPROMs.
A problem common to non-volatile storage elements is their tendency to lose or gain charge after they are programmed or erased. Thus, a programmed element may lose its programmed state or a non-programmed element may gain program status. Charge loss or gain may occur when the die is stressed either through electrical interactions or heat cycles applied thereto.
Methods used to test charge loss or gain involve programming a pattern into the array of storage elements, stressing the die and thereafter reading bits within the array. If the location of read bits corresponds to the programmed locations, then charge loss or gain appears not to have occurred, at least for the bits associated with that test pattern.
In most instances, a manufacturer will test the non-volatile storage elements while the die is associated with a wafer. The manufacturer may perform more extensive tests after the previously tested (i.e., "probed"), viable die are packaged. Both the probe test and the packaged die test can be performed at numerous temperatures, and the storage elements can be programmed with multiple patterns to check for charge gain or loss. However, testing the storage elements implies that those elements can be programmed and re-programmed in multiple ways. A problem exists if a portion of the storage elements can only be programmed with a unique bit pattern existing prior to the probe test. If a pattern is applied to the previously programmed bits, the uniqueness of those bits will be lost.
It would be desirable to utilize a set of storage locations which receive information unique to the die on which they are programmed. Attributing information as to the manufacture, test, and programmability of a die into that set of storage devices would be beneficial in tracing performance history to the parameters by which that die was produced, tested, and programmed. The desirous technique of electrically programming non-volatile storage elements of each and every die with a unique bit pattern would prove valuable to an integrated circuit manufacturer who desires traceability of a die to how that die was manufactured, when it was manufactured, how it was tested, results from those tests, testers used, where the die was drawn from a wafer, from a wafer lot, how the die was processed, processing equipment used, programming equipment used, the method/equipment used, etc.